Nava

Role &amp; Responsibilities
<ul>
<li>Design, write, and optimize high-performance CUDA kernels targeting NVIDIA Ampere, Hopper, and upcoming architectures.</li>
<li>Profile and debug GPU memory bandwidth, occupancy, and instruction-level bottlenecks using Nsight Compute, Visual Profiler, and custom instrumentation.</li>
<li>Collaborate with ML and HPC teams to translate algorithmic requirements into efficient, scalable, and portable GPU code.</li>
<li>Implement fused operations, shared memory optimizations, and warp-level primitives to maximize throughput under latency and memory constraints.</li>
<li>Contribute to kernel library development and maintain reusable, well-documented, and performance-tested modules.</li>
<li>Stay ahead of evolving CUDA toolchains, compiler flags, and architecture-specific features to continuously extract performance wins.</li>
</ul>
Skills &amp; Qualifications
Must-Have
<ul>
<li>CUDA C++</li>
<li>Nsight Compute</li>
<li>NVIDIA GPU Architecture (Ampere/Hopper)</li>
<li>GPU Memory Hierarchy Optimization</li>
<li>Warp-Level Primitives</li>
<li>Profiling &amp; Performance Tuning</li>
<li>nvcc Compiler</li>
<li>PTX / SASS Assembly (Basic Understanding)</li>
</ul>
Preferred
<ul>
<li>Experience with Tensor Cores and FP8/FP16 kernels</li>
<li>familiarity with cuDNN, cuBLAS, or CUTLASS</li>
<li>Contributions to open-source GPU compute projects</li>
</ul>