Digicomm Semiconductor Pvt. Ltd. is a young semiconductor solutions provider. We accentuate Industry's business by providing our skilled and professional, technical services to fasten SOC development life cycles. Digicomm offers a exclusive combination of research and development consultancy, to Semiconductor Vendors.
Established in 2012, we are committed to higher end technical assistance to our clients by innovative approach of expertise.
DigiComm works with customers to help them get to market ahead of the competition, and stay focused on new product development and manufacturing. With deep understanding of the semiconductor industry, access to current and emerging technologies, mature development processes, we creates complete solutions to help clients succeed. 
On the other hand we have our educational division which has been consistently working since decade on design and development of higher end electronics & communications trainer kits, which are widely used by young engineers during their prospectus, across India .

SOC SOLUTION PROVIDER:
- Physical Design Expert  
- STA Expert 
- Layout Design Expert 
- Front End Experts

Digicomm Semiconductor Pvt. Ltd.

<h2>Job description</h2><div>Exciting Opportunity for Physical Verification Engineers ! Elevate your career with Digicomm Semiconductor Private Limited and take the next leap in your professional journey. Join us for unparalleled growth and development.</div><div><br></div><div>Responsibilities:-</div><div><br></div><ul><li>Design Rule Checking (DRC): Run DRC checks using industry-standard tools to identify violations of manufacturing design rules. Collaborate with layout designers to resolve DRC issues.</li><li>Layout vs. Schematic (LVS) Verification: Perform LVS checks to ensure that the physical layout accurately matches the schematic and that there are no electrical connectivity discrepancies.</li><li>Electrical Rule Checking (ERC): Verify that the layout adheres to electrical constraints and requirements, such as voltage and current limitations, ensuring that the IC functions as intended.</li><li>Design for Manufacturing (DFM): Collaborate with design and manufacturing teams to optimize the layout for the semiconductor fabrication process. Address lithography and process variation concerns.</li><li>Process Technology Calibration: Calibrate layout extraction tools and parameters to match the specific process technology used for fabrication.</li><li>Resolution Enhancement Techniques (RET): Implement RET techniques to improve the printability of layout patterns during the photolithography process.</li><li>Fill Insertion: Insert fill cells into the layout to improve planarity and reduce manufacturing-related issues, such as wafer warping and stress.</li><li>Multi-Patterning and Advanced Nodes: Deal with challenges specific to advanced process nodes, including multi-patterning, coloring, and metal stack variations.</li><li>Hotspot Analysis: Identify and address potential hotspot areas that may lead to manufacturing defects or yield issues.</li><li>Post-Processing Simulation: Perform post-processing simulations to verify that the layout is compatible with the manufacturing process and does not introduce unwanted parasitics.</li><li>Process Integration Checks: Collaborate with process integration teams to ensure the smooth integration of the design with the semiconductor fabrication process.</li><li>Documentation: Maintain detailed documentation of verification processes, methodologies, and results.</li></ul><div><br></div><div><strong>Qualifications</strong>: BTECH/MTECH</div><div><br></div><div><strong>Experience:</strong> 5+ years of Experience</div><div><br></div><div><strong>Location</strong>: Bangalore &amp; Noida</div>